Board

ESP32-S3 ETH Development Board specs, pinout & datasheets

Imported entry: generated from open-source board definitions (circuitpython), not reviewed by a person. Each fact links to the definition it came from.

Can I still use it?

1 platforms
CircuitPython
Supported[1]

As published by each project, checked weekly. A platform not listed has no published information here, which is not the same as no support.

Pinout

37 pins
Pin names in firmware (37 pins)
From the firmware’s board definition[2]
Chip pinBoard names
GPIO0IO0
GPIO1IO1
GPIO2IO2
GPIO3IO3
GPIO4SD_CS, IO4
GPIO5SD_MISO, IO5
GPIO6SD_MOSI, IO6
GPIO7SD_CLK, IO7
GPIO9ETH_RST, IO9
GPIO10ETH_INT, IO10
GPIO11ETH_MOSI, IO11
GPIO12ETH_MISO, IO12
GPIO13ETH_CLK, IO13
GPIO14ETH_CS, IO14
GPIO15IO15
GPIO16IO16
GPIO17IO17
GPIO18IO18
GPIO19IO19
GPIO20IO20
GPIO21NEOPIXEL, IO21
GPIO33IO33
GPIO34IO34
GPIO35IO35
GPIO36IO36
GPIO37IO37
GPIO38IO38
GPIO39IO39
GPIO40IO40
GPIO41IO41
GPIO42IO42
GPIO43TX, IO43
GPIO44RX, IO44
GPIO45IO45
GPIO46IO46
GPIO47IO47
GPIO48IO48

Sources

2 sources
  1. CircuitPython board definition (waveshare_esp32_s3_eth) at 83b54473a1
  2. CircuitPython pin definitions (waveshare_esp32_s3_eth) at 395b187017

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Reviewed by hand

Every report is read by a person and checked against a source before anything changes. Please link one if you have it.

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